18761437418/lark1fq
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

fix debug port from uart4 to usart6

Browse Source
This commit is contained in:
zhji 2024-03-30 16:30:58 +08:00
parent 74f37f854d
commit 8ebe10e99f
1 changed files with 21 additions and 21 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

42
lark1fq/src/debug.c
View File

@ -16,7 +16,7 @@ void debug_init(void)
/* config debug uart pin */ /* config debug uart pin */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE); RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);
GPIO_PinAFConfig(DEBUG_UART_PORT, GPIO_PinSource10, GPIO_AF_UART4); GPIO_PinAFConfig(DEBUG_UART_PORT, GPIO_PinSource6, GPIO_AF_USART6);
GPIO_InitStructure.GPIO_Pin = DEBUG_UART_PIN; GPIO_InitStructure.GPIO_Pin = DEBUG_UART_PIN;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
@ -24,19 +24,19 @@ void debug_init(void)
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_Init(DEBUG_UART_PORT, &GPIO_InitStructure); GPIO_Init(DEBUG_UART_PORT, &GPIO_InitStructure);
/* config debug uart function */ /* config debug uart function */
RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART4, ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART6, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE); RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE);
USART_DeInit(UART4); USART_DeInit(USART6);
USART_OverSampling8Cmd(UART4, DISABLE); USART_OverSampling8Cmd(USART6, DISABLE);
USART_InitStructure.USART_BaudRate = DEBUG_UART_BAUDRATE; USART_InitStructure.USART_BaudRate = DEBUG_UART_BAUDRATE;
USART_InitStructure.USART_WordLength = USART_WordLength_8b; USART_InitStructure.USART_WordLength = USART_WordLength_8b;
USART_InitStructure.USART_Parity = USART_Parity_No; USART_InitStructure.USART_Parity = USART_Parity_No;
USART_InitStructure.USART_StopBits = USART_StopBits_1; USART_InitStructure.USART_StopBits = USART_StopBits_1;
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Tx; USART_InitStructure.USART_Mode = USART_Mode_Tx;
USART_Init(UART4, &USART_InitStructure); USART_Init(USART6, &USART_InitStructure);
USART_DMACmd(UART4, USART_DMAReq_Tx, ENABLE); USART_DMACmd(USART6, USART_DMAReq_Tx, ENABLE);
USART_Cmd(UART4, ENABLE); USART_Cmd(USART6, ENABLE);
/* Configure DMA controller to manage UART TX request */ /* Configure DMA controller to manage UART TX request */
DMA_InitStructure.DMA_BufferSize = DEBUG_CHAN_MAX * 4 + 4; DMA_InitStructure.DMA_BufferSize = DEBUG_CHAN_MAX * 4 + 4;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable; DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
@ -45,22 +45,22 @@ void debug_init(void)
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_PeripheralBaseAddr =(uint32_t)(&(UART4->DR)); DMA_InitStructure.DMA_PeripheralBaseAddr =(uint32_t)(&(USART6->DR));
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_Priority = DMA_Priority_Low; DMA_InitStructure.DMA_Priority = DMA_Priority_Low;
DMA_InitStructure.DMA_Channel = DMA_Channel_4; DMA_InitStructure.DMA_Channel = DMA_Channel_5;
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral; DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)debug_buff; DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)debug_buff;
DMA_Init(DMA1_Stream4, &DMA_InitStructure); DMA_Init(DMA2_Stream6, &DMA_InitStructure);
/* Configure interrupt for UART4 TX */ /* Configure interrupt for USART6 TX */
NVIC_InitStructure.NVIC_IRQChannel = UART4_IRQn; NVIC_InitStructure.NVIC_IRQChannel = USART6_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 10; NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 10;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure); NVIC_Init(&NVIC_InitStructure);
USART_ITConfig(UART4, USART_IT_TC, ENABLE); USART_ITConfig(USART6, USART_IT_TC, ENABLE);
/* debug data init */ /* debug data init */
debug_data.enable = DEBUG_ENABLE; debug_data.enable = DEBUG_ENABLE;
@ -74,9 +74,9 @@ void debug_send_frame(void)
} }
debug_data.busy = 1; debug_data.busy = 1;
*(uint32_t *)(debug_buff + DEBUG_CHAN_MAX) = 0x7F800000; *(uint32_t *)(debug_buff + DEBUG_CHAN_MAX) = 0x7F800000;
DMA_SetCurrDataCounter(DMA1_Stream4, sizeof(debug_buff)); DMA_SetCurrDataCounter(DMA2_Stream6, sizeof(debug_buff));
USART_ClearITPendingBit(UART4, USART_IT_TC); USART_ClearITPendingBit(USART6, USART_IT_TC);
DMA_Cmd(DMA1_Stream4, ENABLE); DMA_Cmd(DMA2_Stream6, ENABLE);
} }
void debug_write_data(uint16_t ch, float data) void debug_write_data(uint16_t ch, float data)
@ -90,11 +90,11 @@ void debug_write_data(uint16_t ch, float data)
debug_buff[ch] = data; debug_buff[ch] = data;
} }
void UART4_IRQHandler(void) void USART6_IRQHandler(void)
{ {
if (USART_GetITStatus(UART4, USART_IT_TC) != RESET) { if (USART_GetITStatus(USART6, USART_IT_TC) != RESET) {
USART_ClearITPendingBit(UART4, USART_IT_TC); USART_ClearITPendingBit(USART6, USART_IT_TC);
DMA_ClearFlag(DMA1_Stream4, DMA_FLAG_TCIF4); DMA_ClearFlag(DMA2_Stream6, DMA_FLAG_TCIF6);
debug_data.busy = 0; debug_data.busy = 0;
} }
} }